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general description the MAX3969 limiting amplifier with pecl data outputs is ideal for low-cost atm, fast ethernet, fddi and escon fiber optic receivers. the MAX3969 features 1mv p-p input sensitivity and an integrated power detector that senses the input signal power. it provides a received-signal-strength indicator (rssi), which is an analog indication of the power level. signal strength is also indicated by the complementary ttl loss-of-signal (los) outputs and the pecl signal- detect (sd) output, both of which indicate the power level relative to a programmable threshold. the threshold can be adjusted to detect signal ampli- tudes as low as 2.7mv p-p . an optional squelch function disables switching of the data outputs by holding them at a known state when the signal is below the pro- grammed threshold. the MAX3969 is available in die form and a 4mm x 4mm, 20-pin thin qfn package. applications sfp/sff transceivers fast ethernet/fddi transceivers 155mbps lan atm transceivers escon receivers fttx transceivers features ? 1mv p-p input sensitivity ? loss-of-signal detector with programmable threshold ? ttl los and pecl signal detect ? analog received-signal-strength indicator ? output squelch function ? compatible with 4b/5b data coding MAX3969 200mbps sfp limiting amplifier ________________________________________________________________ maxim integrated products 1 ordering information 150 ? 150 ? v cc c in 0.01 f c in 0.01 f c az 0.027 f c filter 0.01 f rssi diagnostic monitor squelch in- in+ czp czn filter v cc v cco inv v th gnd los los out+ out- sd r2 r1 100k ? MAX3969 0.01 f max3657 gnd out+ out- v cc v cc filt in 0.1 f 0.1 f +2.97v to +3.63v r los 4.7k ? to 10k ? sfp optical receiver with diagnostics host board t ypical application circuits 19-3251; rev 0; 4/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin- package pkg code MAX3969etp -40? to +85? 20 thin qfn t2044-2 MAX3969e/d** dice* * dice are designed to operate over a -40? to +100? junction temperature (t j ) range, but are tested and guaranteed only at t a = +25?. ** future product?ontact factory for availability. typical application circuits continued at end of data sheet. pin configuration appears at end of data sheet.
MAX3969 200mbps sfp limiting amplifier 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. power-supply voltage range (v cc , v cco ) ..........-0.5v to +7.0v voltage at filter, rssi, in+, in-, czp, czn, squelch, inv, v th ..................................................-0.5v to (v cc + 0.5v) ttl output current (los, los ) .........................................?ma pecl output current (out+, out-, sd) .........................?0ma differential voltage between czp and czn..........-1.5v to +1.5v differential voltage between in+ and in- .............-1.5v to +1.5v continuous power dissipation (t a = +85?) 20-pin thin qfn (derate 16.9mw/? above +85?) ....1099mw operating junction temperature range (die) .....-40? to +150? die attach temperature...................................................+400? storage temperature range .............................-50? to +150? lead temperature (soldering, 10s) .................................+300? electrical characteristics (v cc = +2.97v to +5.5v, pecl outputs terminated with 50 ? to v cc - 2v, r1 = 100k ? , t a = -40? to +85?, unless otherwise noted. typical values are at v cc = +3.3v, t a = +25?.) (note 1) parameter conditions min typ max units supply current pecl outputs open 22 45 ma los hysteresis input = 4.0mv p-p (note 2) 3.0 5 8.0 db squelch input current 27 100 ? pecl output-voltage high (note 3) -1085 -880 mv pecl output-voltage low (note 3) -1830 -1550 mv input = 7mv p-p or 90mv p-p , 0 c to +85 c -3.0 +3.0 db los assert accuracy input = 7mv p-p or 90mv p-p , -40 c to +85 c-3.6 +3.6 db minimum los assert input 2.7 mv p-p maximum los deassert input 143 mv p-p input sensitivity (note 4) 1 4 mv p-p input overload (note 4) 1500 mv p-p ttl output high r los = 4.7k ? to 10k ? 2.4 3.0 v ttl output leakage (note 5) 1 20 a ttl output low i ol = 800? 0.2 0.5 v data output transition time 20% to 80%, input > 4mv p-p (note 4) 0.35 0.8 1.20 ns pulse-width distortion input > 4mv p-p (notes 4, 6) 50 250 ps los, sd assert/deassert time c filter = 0.01? 10 ? note 1: dice are tested and guaranteed only at t a = +25?. note 2: los hysteresis = 20log(v los-deassert / v los-assert ). note 3: relative to supply voltage (v cco ). note 4: ac characteristics are guaranteed by design and characterization. note 5: input < los threshold (los = high), v los = 2.4v. note 6: pulse-width distortion = [(width of wider pulse) - (width of narrower pulse)] / 2, measured with 100mbps 1-0 pattern.
MAX3969 200mbps sfp limiting amplifier _______________________________________________________________________________________ 3 t ypical operating characteristics (v cc = +3.3v, pecl outputs terminated with 50 ? to v cc - 2v, r1 = 100k ? , t a = +25?, unless otherwise noted.) supply current vs. temperature (pecl outputs open) MAX3969 toc01 ambient temperature ( c) supply current (ma) 60 35 10 -15 5 10 15 20 25 30 35 40 45 50 55 60 0 -40 85 1ns/div output eye diagram (v in = 2mv p-p , 155mbps, 2 23 - 1 prbs) 200mv/div MAX3969 toc02 1ns/div output eye diagram (v in = 1500mv p-p , 155mbps, 2 23 - 1 prbs) 200mv/div MAX3969 toc03 transfer function MAX3969 toc04 differential input voltage (mv p-p ) differential output voltage (mv p-p ) 1000 100 10 1 0.1 800 1000 1200 1400 1600 1800 600 0.01 10,000 bit error ratio vs. differential input voltage MAX3969 toc05 differential input voltage (mv p-p ) bit error ratio 0.4 10-03 0 10-04 10-05 10-06 10-07 10-08 10-09 10-10 10-11 10-12 0.1 0.2 0.3 0.5 0.6 0.7 0.8 155mbps 2 23 - 1 prbs rssi voltage vs. differential input voltage MAX3969 toc06 differential input voltage (mv p-p ) v rssi (v) 100 10 1.20 1.40 1.60 1.80 2.00 2.20 2.40 2.60 2.80 3.00 1.00 11000 rssi load > 10k ? 155mbps 2 23 - 1 prbs los low los high 1.4 1.6 1.5 1.9 1.8 1.7 2.2 2.1 2.0 2.3 -40 0 20 -20 40 60 80 100 rssi voltage vs. temperature (los low, rssi load > 10k ? ) MAX3969 toc07 ambient temperature ( c) v rssi (v) input = 100mv p-p input = 50mv p-p input = 10mv p-p input = 5mv p-p power-detect threshold vs. r2 (r1 = 100k ? ) MAX3969 toc08 r2 (k ? ) differential input voltage (mv p-p ) 110 100 90 80 70 60 50 40 30 20 10 100 1000 1 10 120 sd low/ los high sd high/ los low 155mbps 2 23 - 1 prbs 0 3 2 1 4 5 6 7 8 9 10 -40 10 -15 35 60 85 loss-of-signal hysteresis vs. temperature MAX3969 toc09 ambient temperature ( c) 20log (v deassert / v assert ) (db) 155mbps 2 23 -1 prbs r2 = 10k ? r2 = 50k ?
MAX3969 200mbps sfp limiting amplifier 4 _______________________________________________________________________________________ 10 s/div power-detect timing with squelch (input = 12mv p-p , c filter = 0.01 f, r2 = 15k ? , 155mbps, 2 23 - 1 prbs) in MAX3969 toc10 out los sd pulse-width distortion vs. differential input voltage MAX3969 toc11 differential input voltage (mv p-p ) pulse-width distortion (ps) 1000 100 10 10 20 30 40 50 60 70 80 90 100 0 11 0,000 100mbps 1-0 pattern input data through 117mhz filter unfiltered input data 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 -40 -15 10 35 60 85 data output transition time vs. temperature MAX3969 toc12 ambient temperature ( c) transition time (ns) t ypical operating characteristics (continued) (v cc = +3.3v, pecl outputs terminated with 50 ? to v cc - 2v, r1 = 100k ? , t a = +25?, unless otherwise noted.) pin description pin name function 1 inv inverting input of internal op amp that sets power-detect threshold voltage (figure 1). connect a resistor from v th to inv (r2), and from inv to ground (r1 = 100k ? ), to program the desired threshold voltage. 2 filter filter output of logarithmic full-wave detectors (fwds). the fwd outputs are summed together at filter to generate the rssi output. connect a capacitor from filter to v cc for proper operation. 3 rssi received-signal-strength indicator output. the voltage at rssi indicates the input-signal power. the rssi output is reduced approximately 120mv when los is asserted. 4 in- inverting data input 5 in+ noninverting data input 6 , 7, 8 gnd ground 9 czp autozero capacitor input. connect a 0.027? capacitor between czp and czn. 10 czn autozero capacitor input. connect a 0.027? capacitor between czp and czn. 11 v cco output-buffer supply voltage. connect to the same potential as v cc . 12 out+ noninverting pecl data output. terminate with 50 ? to (v cc - 2v). 13 out- inverting pecl data output. terminate with 50 ? to (v cc - 2v). 14 sd signal detect, pecl output. the sd output is high when input power is above the power-detect threshold, and low when input power is below the power-detect threshold. this pin is pecl- compatible and should be terminated with 50 ? to (v cc - 2v) or equivalent. 15 los loss-of-signal output, ttl open collector (with esd protection). the los output is high when input power is below the power-detect threshold, and low when input power is above the power-detect threshold. 16 los inverted loss-of-signal output, ttl open collector (with esd protection). the los output is low when input power is below the power-detect threshold, and high when input power is above the power-detect threshold.
MAX3969 200mbps sfp limiting amplifier _______________________________________________________________________________________ 5 pin description pin name function 17, 18 v cc supply voltage 19 squelch squelch input. the squelch function disables the data outputs by forcing out- low and out+ high when the signal is below the power-detect threshold. connect to gnd or leave unconnected to disable squelch. connect to v cc to enable squelch. 20 v th output of internal op amp that sets power-detect threshold voltage (figure 1). connect a resistor from v th to inv (r2) and from inv to ground (r1 = 100k ? ), to program the desired threshold voltage. ep exposed pad ground. the exposed pad must be soldered to the circuit board ground for proper thermal and electrical performance. offset correction 1 1 o 1.2v reference c in c in in+ filter v cc in- fwd fwd fwd c filter c az czn czp r1 100k ? r2 inv v th v cc v cco gnd out- out+ squelch rssi los los sd MAX3969 pecl ttl pecl figure 1. functional diagram detailed description the MAX3969 contains a series of limiting amplifiers and power detectors, offset correction, data-squelch circuitry, ttl buffers for los outputs, and pecl output buffers for signal detect (sd) and data outputs. see figure 1 for the functional diagram. gain stages and offset correction a cascade of limiting amplifiers provides approximately 65db of combined small-signal gain. the large gain makes the amplifier susceptible to small dc offsets in the signal path. to correct dc offsets, the amplifier has an internal feedback loop that acts as a dc autozero circuit. by correcting the dc offsets, the limiting amplifi- er sensitivity and power-detector accuracy are improved. the offset correction is optimized for data streams with a 50% duty cycle. a different average duty cycle results in increased pulse-width distortion and loss of sensitivi- ty. the offset-correction circuitry is less sensitive to vari- ations of input duty cycle (for example, the 40% to 60% duty cycle encountered in 4b/5b coding) when the input is less than 30mv p-p . the data inputs must be ac-coupled for the offset cor- rection loop to function properly. differential input impedance is >5k ? .
MAX3969 power detector each amplifier stage contains a logarithmic fwd, which indicates the rms input signal power. the fwd outputs are summed together at the filter pin where the sig- nal is filtered by an external capacitor (c filter ) con- nected between filter and v cc . the filter signal generates the rssi output voltage (v rssi ), which is proportional to the input power in decibels. when los is low, v rssi is approximated by the following equation: v rssi (v) = 1.2v + 0.5log (v in ) where, v in is the data input voltage measured in mv p-p . this relation translates to a 25mv increase in v rssi for every 1db increase in v in . the rssi output is reduced approximately 120mv when los is high. typically the rssi output is connected to an a/d con- verter for diagnostic monitoring. this output can be left open if not required in the application. the rssi output is designed to drive a minimum load resistance of 10k ? to ground, and a maximum capacitance of 10pf. a 10k ? series resistor is required to buffer loads greater than 10pf. signal-strength comparator a comparator is used to indicate the input signal strength relative to a user-programmable threshold. one of the comparator inputs is connected to the rssi output signal, and the other is connected to the thresh- old voltage (v th ), which is set externally and provides a trip point for signal-strength indication. when the sig- nal strength is above the threshold, the sd output asserts high and the los output deasserts low. likewise, when the signal strength falls below the threshold, sd deasserts low and los asserts high. to ensure chatter-free operation, the comparator is designed with approximately 5db of hysteresis. squelch the squelch function disables the data outputs by forc- ing out- low and out+ high when the input signal is below the programmed threshold. this function ensures that when there is a loss of signal, the limiting amplifier and all downstream devices do not respond to input noise. connect squelch to gnd or leave it unconnected to disable squelch. connect squelch to v cc to enable squelch. pecl outputs the data outputs (out+, out-) and signal-detect out- put (sd) are supply-referenced pecl outputs. see figure 2 for the equivalent output circuit. both data outputs must be terminated for proper opera- tion, but the sd output can be left open if not required in the application. the proper termination for a pecl output is 50 ? to (v cc - 2v), but other standard termina- tion techniques can be used. for more information on pecl terminations and how to interface with other logic families, refer to maxim application note hfan-01.0: introduction to lvds, pecl, and cml. ttl outputs the los outputs (los, los ) are implemented with open-collector, schottky-clamped, esd-protected, ttl- compatible outputs. see figure 3 for the equivalent out- put circuit. the los outputs require external pullup resistors for proper operation. resistor values between 4.7k ? and 10k ? are recommended. if the los outputs are not required for the application, they can be left open. design procedure program the power-detect threshold the suggested procedure for setting the power-detect threshold is given below and is illustrated in figure 4. 1) determine the maximum receiver sensitivity (rx_max) in dbm and the pin-tia responsivity (g) in v/w. 2) calculate the differential voltage swing (vin_sen) at the MAX3969 inputs while operating at sensitivity. v in_sen = 10 (rx_max / 10) x 2 x g 3) calculate the threshold voltage (v in_th ) at which los must be low (sd must be high) by allowing 3.6db (1.8db optical) margin for power-detector accuracy. v in_th = v in_sen x 0.66 4) use v in_th and the line labeled (sd high / los low) in the power-detect threshold vs. r2 graph in the typical operating characteristics to deter- mine the value of r2. select r1=100k ? . 200mbps sfp limiting amplifier 6 _______________________________________________________________________________________
select c filter for sfp/sff, fddi, 155mbps atm lan, fast ethernet, and escon receivers, maxim recommends c filter = 0.01?. this capacitor value ensures chatter-free los/sd and provides a typical assert/deassert time of 10?. for other applications, the value of c filter can be calculated using the following equation: c filter = / 825 ? where is the desired time constant of the power detector. select c az and c in external-coupling capacitors (c in ) are required on the data inputs for the offset correction loop to function properly. the offset correction loop bandwidth is deter- mined by the external capacitor (c az ) connected between czp and czn. the poles associated with c in and c az must work together to provide a flat response at the lower -3db corner frequency. for sfp/sff, fddi, 155mbps atm lan, fast ethernet, and escon receivers, maxim recommends the following: c in = 0.01? c az = 0.027? MAX3969 200mbps sfp limiting amplifier _______________________________________________________________________________________ 7 v cco out- out+ esd structures figure 2. equivalent pecl output circuit los/los esd structures v cco figure 3. equivalent ttl output circuit pin-tia responsivity = g 1.8db 2.5db 10 log(optical power) 20 log(v in ) rx_max (sensitivity) sd high / los low sd low / los high 5db 3.6db v in_th v in_sen figure 4. signal levels for power-detect threshold
MAX3969 applications information wire bonding for high-current density and reliable operation, the MAX3969 uses gold metalization. for best results, use gold-wire ball-bonding techniques. use caution if attempting wedge bonding. die pad size is 4 mils x 4 mils. die thickness is 16 mils. table 1 lists the bond pad coordinates for the MAX3969. the origin for pad coordinates is defined as the bottom left corner of the bottom left pad. all pad locations are referenced from the origin and indicate the center of the pad where the bond wire should be connected. refer to maxim application note hfan-08.0.1: understanding bonding-coordinates and physical die size for detailed information. 200mbps sfp limiting amplifier 8 _______________________________________________________________________________________ coordinates ( m) pad name xy 1 inv 46.6 659.5 2 filter 46.6 505.6 3 rssi 46.6 351.7 4 in- 46.6 197.8 5 in+ 46.6 46.6 6 gnd 195.1 -99.1 7 gnd 432.7 -99.1 8 gnd 589.3 -99.1 9 czp 743.2 -99.1 10 czn 945.7 -99.1 11 v cco 1204.9 -96.4 12 out+ 1204.9 81.7 13 out- 1204.9 262.6 14 sd 1204.9 492.1 15 los 1204.9 697.3 16 los 1053.7 818.8 17 v cc 808.0 818.8 18 v cc 586.6 818.8 19 squelch 432.7 818.8 20 v th 195.1 818.8 table 1. bond pad coordinates 20 19 18 17 v th squelch v cc v cc 16 los 13 12 11 14 15 out+ out- sd los v cco 4 3 2 1 in- rssi filter inv 5 in+ 6789 gnd gnd gnd czp 10 czn MAX3969 top view thin qfn pin configuration chip information transistor count: 915 substrate connected to gnd process: silicon bipolar die thickness: 16 mils
MAX3969 200mbps sfp limiting amplifier _______________________________________________________________________________________ 9 gnd los sd out- out+ 47mil (1.19mm) 57mil (1.45mm) filter rssi in- in+ inv v th v cc squelch v cco gnd gnd czp czn v cc los 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 origin chip topography
MAX3969 200mbps sfp limiting amplifier 10 ______________________________________________________________________________________ 50 ? 50 ? 50 ? v cc - 2v v cc c in 0.01 f c in 0.01 f c az 0.027 f c filter 0.01 f rssi squelch in- in+ czp czn filter v cc v cco inv v th gnd los los out+ out- sd r2 r1 100k ? MAX3969 0.01 f max3657 gnd out+ out- v cc v cc filt in sff or 1 x 9 msa receiver t ypical application circuits (continued)
MAX3969 200mbps sfp limiting amplifier maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 11 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 24l qfn thin.eps c 1 2 21-0139 package outline 12, 16, 20, 24l thin qfn, 4x4x0.8mm c 2 2 21-0139 package outline 12, 16, 20, 24l thin qfn, 4x4x0.8mm

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